HM538253BJ-8

Product Summary

The HM538253BJ-8 is a 2-Mbit multiport video RAM equipped with a 256-kword × 8-bit dynamic RAM and a 512-word × 8-bit SAM (full-sized SAM). Its RAM and SAM operate independently and asynchronously. The HM538253BJ-8 is upwardly compatible with the HM538253BJ-8 except that the pseudo-write-transfer cycle is replaced with masked-write-transfer cycle, which has been approved by JEDEC. Furthermore, several new features have been added to the HM538253BJ-8 which do not conflict with the conventional features. The stopping column feature realizes allows greater flexibility for split SAM register lengths. Persistent mask is also installed according to the TMS34020 features. The HM538253BJ-8 has Hyper page mode which enables fast page cycle.

Parametrics

HM538253BJ-8 absolute maximum ratings: (1)Voltage on any pin relative to VSS, VT: -1.0 to +7.0 V; (2)Supply voltage relative to VSS, VCC: -0.5 to +7.0 V; (3)Short circuit output current, Iout: 50 mA; (4)Power dissipation, PT: 1.0 W; (5)Operating temperature, Topr: 0 to +70℃; (6)Storage temperature, Tstg: -55 to +125℃.

Features

HM538253BJ-8 features: (1)Multiport organization: RAM and SAM can operate asynchronously and simultaneously; (2)Access time, RAM: 70 ns/80 ns/100 ns max; SAM: 20 ns/23 ns/25 ns max; (3)Cycle time, RAM: 130 ns/150 ns/180 ns min; SAM: 25 ns/28 ns/30 ns min; (4)Low power, Active RAM: 605 mW/550 mW/495 mW; SAM: 358 mW/330 mW/303 mW; Standby 38.5 mW max; (5)Masked-write-transfer cycle capability; (6)Stopping column feature capability; (7)Persistent mask capability; (8)Fast page mode capability: Cycle time: 45 ns/50 ns/55 ns; Power RAM: 605 mW/578 mW/550 mW; (9)Mask write mode capability; (10)Bidirectional data transfer cycle between RAM and SAM capability; (11)Split transfer cycle capability; (12)Block write mode capability; (13)Flash write mode capability; (14)3 variations of refresh (8 ms/512 cycles): RAS-only refresh; CAS-before-RAS refresh; Hidden refresh; (15)TTL compatible.

Diagrams